Algorithms (2)
F R U R' U' F' f R U R' U' f'
My choice
12 HTM · 12 STM · 12 QTM
3-gen
rotationless
<U,R,F>
SpeedCubeDB
F R U R' U' S R U R' U' f'
12 HTM · 11 STM · 12 QTM
rotationless
<U,R,F,S>
SpeedCubeDB
How this case is verified
The case is the source's setup, checked against the source's case image. Setup: f U R U' R' f' F U R U' R' F'. Every algorithm above was run by our logic engine from that state and reaches the set's goal, keeping f2l.