Algorithms (2)
F R U' R' U' R U R' F' R U R' U' R' F R F'
My choice
17 HTM · 17 STM · 17 QTM
3-gen
rotationless
<U,R,F>
SpeedCubeDB
R' U R' U' R D' R' D R' U D' R2 U' R2 D R2
16 HTM · 16 STM · 19 QTM
3-gen
rotationless
<U,R,D>
SpeedCubeDB
How this case is verified
The case is the source's setup (or, where it has none, another source algorithm reversed). Setup: D2' R' U R D' R2' U' R' U R' U R' D' R U2' R'. Every algorithm above was run by our logic engine from that state and reaches "coll-solved", keeping f2l and oll-solved.