F2L 10
F2L
Disconnected Pairs
Find the corner (it has the cross colour) and its edge. Where the cross-coloured sticker of the corner points (up, front or right) and whether the edge's colours match the corner's neighbours tell you the case.
Your status
Algorithms (16)
Into the front-right slot (as drawn above)
U' R U R' U R U R'
My choice
8 HTM · 8 STM · 8 QTM
2-gen
rotationless
oh
<U,R>
SpeedCubeDB, 40 votes
U2 R U' R' U' R U R'
8 HTM · 8 STM · 9 QTM
2-gen
rotationless
oh
<U,R>
SpeedCubeDB, 14 votes
d R' U R d' R U R'
8 HTM · 8 STM · 8 QTM
3-gen
rotationless
<U,R,D>
SpeedCubeDB, 3 votes
y' U R' U R U' f R f'
8 HTM · 8 STM · 8 QTM
3-gen
rotation
<U,R,F>
SpeedCubeDB, 2 votes
Into the back-left slot: the same case turned to that slot, as drawn here
U' L U L' U L U L'
8 HTM · 8 STM · 8 QTM
2-gen
rotationless
<U,L>
SpeedCubeDB, 13 votes
U2 L U' L' U' L U L'
8 HTM · 8 STM · 9 QTM
2-gen
rotationless
<U,L>
SpeedCubeDB, 1 votes
L U' L' U L U L' U2 L U' L'
11 HTM · 11 STM · 12 QTM
2-gen
rotationless
<U,L>
SpeedCubeDB, 0 votes
y2 U' R U R' U R U R'
8 HTM · 8 STM · 8 QTM
2-gen
rotation
oh
<U,R>
SpeedCubeDB, 0 votes
Into the front-left slot: the same case turned to that slot, as drawn here
U L' U L U' F U F'
8 HTM · 8 STM · 8 QTM
3-gen
rotationless
<U,F,L>
SpeedCubeDB, 9 votes
F U' R U R' U2 F'
7 HTM · 7 STM · 8 QTM
3-gen
rotationless
<U,R,F>
SpeedCubeDB, 7 votes
d' L U L' U L U L'
8 HTM · 8 STM · 8 QTM
3-gen
rotationless
<U,D,L>
SpeedCubeDB, 3 votes
y' U' R U R' U R U R'
8 HTM · 8 STM · 8 QTM
2-gen
rotation
oh
<U,R>
SpeedCubeDB, 2 votes
Into the back-right slot: the same case turned to that slot, as drawn here
U R' U R U' f R f'
8 HTM · 8 STM · 8 QTM
3-gen
rotationless
<U,R,F>
SpeedCubeDB, 6 votes
R2 U' F' U F R2
6 HTM · 6 STM · 8 QTM
3-gen
rotationless
<U,R,F>
SpeedCubeDB, 3 votes
y U' R U R' U R U R'
8 HTM · 8 STM · 8 QTM
2-gen
rotation
oh
<U,R>
SpeedCubeDB, 2 votes
d' R U R' U R U R'
8 HTM · 8 STM · 8 QTM
3-gen
rotationless
<U,R,D>
SpeedCubeDB, 2 votes
How this case is verified
The case is the source's setup (or, where it has none, another source algorithm reversed). Setup: R U' R' U' R U' R' U. Every algorithm above was run by our logic engine from that state and reaches "f2l".